GATE Electronics and Communications (EC) 2016 Shift 2 Solved Paper
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Question : 53 of 65
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In an N bit flash ADC, the analog voltage is fed simultaneously to 2𝑁 − 1 comparators. The output of the comparators is then encoded to a binary format using digital circuits. Assume that the analog voltage source Vin (whose output is being converted to digital format) has a source resistance of 75 Ω as shown in the circuit diagram below and the input capacitance of each comparator is 8 pF.
The input must settle to an accuracy of 1/2 LSB even for a full-scale input change for proper conversion. Assume that the time taken by the thermometer to the binary encoder is negligible.
If the flash ADC has 8-bit resolution, which one of the following alternatives is closest to the maximum sampling rate?
The input must settle to an accuracy of 1/2 LSB even for a full-scale input change for proper conversion. Assume that the time taken by the thermometer to the binary encoder is negligible.
If the flash ADC has 8-bit resolution, which one of the following alternatives is closest to the maximum sampling rate?
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