GATE Electronics and Communications (EC) 2019 Solved Paper

In the circuit shown, the threshold voltages of the pMOS $\left(\left|{\mathit{V}}_{\mathit{t}\mathit{p}}\right|\right)$ and $\mathit{n}\mathit{M}\mathit{O}\mathit{S}\left({\mathit{V}}_{\mathit{t}\mathit{n}}\right)$ transistors are both equal to $1\mathit{V}$. All the transistors have the same output resistance ${\mathit{r}}_{\mathit{d}\mathit{s}}$ of $6\mathit{M}\mathit{\Omega }$. The other parameters are listed below.
${\mathit{\mu }}_{\mathit{n}}{\mathit{C}}_{\mathit{o}\mathit{x}}=60\mathit{\mu }\mathit{A}/{\mathit{V}}^2;{\left(\frac{\mathit{W}}{\mathit{L}}\right)}_{\mathit{n}\mathit{M}\mathit{O}\mathit{S}}=5$
${\mathit{M}}_{\mathit{n}}$ and ${\mathit{\mu }}_{\mathit{p}}$ are the carrier mobilites, and ${\mathit{C}}_{\mathit{o}\mathit{x}}$ is the oxide capacitance per unit area. Ignoring the effect of channel length modulation and body bias, the gain of the circuit is __________________ (rounded off to 1 decimal place).